* AD711 SPICE Macro-model 3/91, Rev. C * JLW / PMI * TRW / ADI * * Revision History: * Corrected VOS to be 0.1mV * * This version of the AD711 model simulates the typical * parameters corresponding to the device data sheet. * * Copyright 1991 by Analog Devices, Inc. * * Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance with the terms and provisions in the License Statement. * * connections: non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * | | | | | .SUBCKT AD711 13 15 12 16 14 * VOS 15 8 DC 0.1E-3 EC 9 0 (14,0) 1 C1 6 7 .5E-12 RP 16 12 12E3 GB 11 0 (3,0) 1.67E3 RD1 6 16 16E3 RD2 7 16 16E3 ISS 12 1 DC 100E-6 CCI 3 11 150E-12 GCM 0 3 (0,1) 1.76E-9 GA 3 0 (7,6) 2.3E-3 RE 1 0 2.5E6 RGM 3 0 1.69E3 VC 12 2 DC 2.8 VE 10 16 DC 2.8 RO1 11 14 25 CE 1 0 2E-12 RO2 0 11 30 RS1 1 4 5.77E3 RS2 1 5 5.77E3 J1 6 13 4 FET J2 7 8 5 FET DC 14 2 DIODE DE 10 14 DIODE DP 16 12 DIODE D1 9 11 DIODE D2 11 9 DIODE IOS 15 13 5E-12 .MODEL DIODE D() .MODEL FET PJF(VTO=-1 BETA=1E-3 IS=15E-12) .ENDS * OP27A SPICE Macro-model 12/90, Rev. B * JCB / PMI * * Revision History: * REV. B * Re-ordered subcircuit call out nodes to put the * output node last. * Changed Ios from 35E-9 to 17.5E-9 * Added F1 and F2 to fix short circuit current limit. * * * This version of the OP-27 model simulates the worst case * parameters of the 'A' grade. The worst case parameters * used correspond to those in the data book. * * Copyright 1990 by Analog Devices, Inc. * * Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance with the terms and provisions in the License Statement. * * Node assignments * non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * | | | | | .SUBCKT OP27A 1 2 99 50 39 * * INPUT STAGE & POLE AT 80 MHZ * R3 5 97 0.0619 R4 6 97 0.0619 CIN 1 2 4E-12 C2 5 6 16.07E-9 I1 4 51 1 IOS 1 2 17.5E-9 EOS 9 10 POLY(1) 30 33 25E-6 1 Q1 5 2 7 QX Q2 6 9 8 QX R5 7 4 0.0107 R6 8 4 0.0107 D1 2 1 DX D2 1 2 DX EN 10 1 12 0 1 GN1 0 2 15 0 1 GN2 0 1 18 0 1 * EREF 98 0 33 0 1 EPLUS 97 0 99 0 1 ENEG 51 0 50 0 1 * * VOLTAGE NOISE SOURCE WITH FLICKER NOISE * DN1 11 12 DEN DN2 12 13 DEN VN1 11 0 DC 2 VN2 0 13 DC 2 * * CURRENT NOISE SOURCE WITH FLICKER NOISE * DN3 14 15 DIN DN4 15 16 DIN VN3 14 0 DC 2 VN4 0 16 DC 2 * * SECOND CURRENT NOISE SOURCE * DN5 17 18 DIN DN6 18 19 DIN VN5 17 0 DC 2 VN6 0 19 DC 2 * * FIRST GAIN STAGE * RG1 40 98 1 GG1 98 40 5 6 79.86 DG3 40 41 DX DG4 42 40 DX EG1 97 41 POLY(1) 97 33 -2.1 1 EG2 42 51 POLY(1) 97 33 -2.1 1 * * GAIN STAGE & DOMINANT POLE AT 7.2 HZ * R7 20 98 37.58E3 C3 20 98 588E-9 G1 98 20 40 33 0.333 V1 97 21 1.9 V2 22 51 1.9 D5 20 21 DX D6 22 20 DX * * POLE - ZERO AT 2.9MHZ / 6MHZ * R8 23 98 1 R9 23 24 0.935 C4 24 98 28.4E-9 G2 98 23 20 33 1 * * ZERO - POLE AT 6.8MHZ / 40MHZ * R10 25 26 1 R11 26 98 4.88 L1 26 98 19.4E-9 G3 98 25 23 33 1 * * POLE AT 60 MHZ * R12 27 98 1 C5 27 98 2.65E-9 G4 98 27 25 33 1 * * ZERO AT 28 MHZ * R13 28 29 1 C6 28 29 -5.68E-9 R14 29 98 1E-6 E1 28 98 27 33 1E6 * * COMMON-MODE GAIN NETWORK WITH ZERO AT 11.9 KHZ * R15 30 31 1 L2 31 98 13.3E-6 G5 98 30 POLY(2) 1 33 2 33 0 997.6E-9 997.6E-9 D7 30 97 DX D8 51 30 DX * * POLE AT 80 MHZ * R16 32 98 1 C7 32 98 1.99E-9 G6 98 32 29 33 1 * * OUTPUT STAGE * R17 33 97 1 R18 33 51 1 GSY 99 50 POLY(1) 99 50 3.47E-3 40E-6 F1 34 0 V3 1 F2 0 34 V4 1 R19 34 99 180 R20 34 50 180 L3 34 39 1E-7 G7 37 50 32 34 5.56E-3 G8 38 50 34 32 5.56E-3 G9 34 99 99 32 5.56E-3 G10 50 34 32 50 5.56E-3 V3 35 34 2.5 V4 34 36 3.1 D9 32 35 DX D10 36 32 DX D11 99 37 DX D12 99 38 DX D13 50 37 DY D14 50 38 DY * * MODELS USED * .MODEL QX NPN(BF=12.5E6) .MODEL DX D(IS=1E-15) .MODEL DY D(IS=1E-15 BV=50) .MODEL DEN D(IS=1E-12, RS=1.74K, KF=4.01E-16, AF=1) .MODEL DIN D(IS=1E-12, RS=43.5E-6, KF=11.1E-15, AF=1) .ENDS * OP27B SPICE Macro-model 12/90, Rev. B * JCB / PMI * * Revision History: * REV. B * Re-ordered subcircuit call out nodes to put the * output node last. * Changed Ios from 50E-9 to 25E-9 * Added F1 and F2 to fix short circuit current limit. * * * This version of the OP-27 model simulates the worst case * parameters of the 'B' grade. The worst case parameters * used correspond to those in the data book. * * * Copyright 1990 by Analog Devices, Inc. * * Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance with the terms and provisions in the License Statement. * * Node assignments * non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * | | | | | .SUBCKT OP27B 1 2 99 50 39 * * INPUT STAGE & POLE AT 80 MHZ * R3 5 97 0.0619 R4 6 97 0.0619 CIN 1 2 4E-12 C2 5 6 16.07E-9 I1 4 51 1 IOS 1 2 25E-9 EOS 9 10 POLY(1) 30 33 60E-6 1 Q1 5 2 7 QX Q2 6 9 8 QX R5 7 4 0.0107 R6 8 4 0.0107 D1 2 1 DX D2 1 2 DX EN 10 1 12 0 1 GN1 0 2 15 0 1 GN2 0 1 18 0 1 * EREF 98 0 33 0 1 EPLUS 97 0 99 0 1 ENEG 51 0 50 0 1 * * VOLTAGE NOISE SOURCE WITH FLICKER NOISE * DN1 11 12 DEN DN2 12 13 DEN VN1 11 0 DC 2 VN2 0 13 DC 2 * * CURRENT NOISE SOURCE WITH FLICKER NOISE * DN3 14 15 DIN DN4 15 16 DIN VN3 14 0 DC 2 VN4 0 16 DC 2 * * SECOND CURRENT NOISE SOURCE * DN5 17 18 DIN DN6 18 19 DIN VN5 17 0 DC 2 VN6 0 19 DC 2 * * FIRST GAIN STAGE * RG1 40 98 1 GG1 98 40 5 6 79.86 DG3 40 41 DX DG4 42 40 DX EG1 97 41 POLY(1) 97 33 -2.1 1 EG2 42 51 POLY(1) 97 33 -2.1 1 * * GAIN STAGE & DOMINANT POLE AT 7.2 HZ * R7 20 98 37.58E3 C3 20 98 588E-9 G1 98 20 40 33 0.333 V1 97 21 1.9 V2 22 51 1.9 D5 20 21 DX D6 22 20 DX * * POLE - ZERO AT 2.9MHZ / 6MHZ * R8 23 98 1 R9 23 24 0.935 C4 24 98 28.4E-9 G2 98 23 20 33 1 * * ZERO - POLE AT 6.8MHZ / 40MHZ * R10 25 26 1 R11 26 98 4.88 L1 26 98 19.4E-9 G3 98 25 23 33 1 * * POLE AT 60 MHZ * R12 27 98 1 C5 27 98 2.65E-9 G4 98 27 25 33 1 * * ZERO AT 28 MHZ * R13 28 29 1 C6 28 29 -5.68E-9 R14 29 98 1E-6 E1 28 98 27 33 1E6 * * COMMON-MODE GAIN NETWORK WITH ZERO AT 30 KHZ * R15 30 31 1 L2 31 98 5.30E-6 G5 98 30 POLY(2) 1 33 2 33 0 2.51E-6 2.51E-6 D7 30 97 DX D8 51 30 DX * * POLE AT 80 MHZ * R16 32 98 1 C7 32 98 1.99E-9 G6 98 32 29 33 1 * * OUTPUT STAGE * R17 33 97 1 R18 33 51 1 GSY 99 50 POLY(1) 99 50 3.47E-3 40E-6 F1 34 0 V3 1 F2 0 34 V4 1 R19 34 99 180 R20 34 50 180 L3 34 39 1E-7 G7 37 50 32 34 5.56E-3 G8 38 50 34 32 5.56E-3 G9 34 99 99 32 5.56E-3 G10 50 34 32 50 5.56E-3 V3 35 34 2.5 V4 34 36 3.1 D9 32 35 DX D10 36 32 DX D11 99 37 DX D12 99 38 DX D13 50 37 DY D14 50 38 DY * * MODELS USED * .MODEL QX NPN(BF=9.09E6) .MODEL DX D(IS=1E-15) .MODEL DY D(IS=1E-15 BV=50) .MODEL DEN D(IS=1E-12, RS=1.74K, KF=4.01E-16, AF=1) .MODEL DIN D(IS=1E-12, RS=43.5E-6, KF=11.1E-15, AF=1) .ENDS * OP27C SPICE Macro-model 12/90, Rev. B * JCB / PMI * * Revision History: * REV. B * Re-ordered subcircuit call out nodes to put the * output node last. * Changed Ios from 75E-9 to 37.5E-9 * Added F1 and F2 to fix short circuit current limit. * * * This version of the OP-27 model simulates the worst case * parameters of the 'C' grade. The worst case parameters * used correspond to those in the data book. * * * Copyright 1990 by Analog Devices, Inc. * * Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance with the terms and provisions in the License Statement. * * Node assignments * non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * | | | | | .SUBCKT OP27C 1 2 99 50 39 * * INPUT STAGE & POLE AT 80 MHZ * R3 5 97 0.0619 R4 6 97 0.0619 CIN 1 2 4E-12 C2 5 6 16.07E-9 I1 4 51 1 IOS 1 2 37.5E-9 EOS 9 10 POLY(1) 30 33 100E-6 1 Q1 5 2 7 QX Q2 6 9 8 QX R5 7 4 0.0107 R6 8 4 0.0107 D1 2 1 DX D2 1 2 DX EN 10 1 12 0 1 GN1 0 2 15 0 1 GN2 0 1 18 0 1 * EREF 98 0 33 0 1 EPLUS 97 0 99 0 1 ENEG 51 0 50 0 1 * * VOLTAGE NOISE SOURCE WITH FLICKER NOISE * DN1 11 12 DEN DN2 12 13 DEN VN1 11 0 DC 2 VN2 0 13 DC 2 * * CURRENT NOISE SOURCE WITH FLICKER NOISE * DN3 14 15 DIN DN4 15 16 DIN VN3 14 0 DC 2 VN4 0 16 DC 2 * * SECOND CURRENT NOISE SOURCE * DN5 17 18 DIN DN6 18 19 DIN VN5 17 0 DC 2 VN6 0 19 DC 2 * * FIRST GAIN STAGE * RG1 40 98 1 GG1 98 40 5 6 79.88 DG3 40 41 DX DG4 42 40 DX EG1 97 41 POLY(1) 97 33 -2.1 1 EG2 42 51 POLY(1) 97 33 -2.1 1 * * GAIN STAGE & DOMINANT POLE AT 10.3 HZ * R7 20 98 26.32E3 C3 20 98 588E-9 G1 98 20 40 33 0.333 V1 97 21 2.4 V2 22 51 2.4 D5 20 21 DX D6 22 20 DX * * POLE - ZERO AT 2.9MHZ / 6MHZ * R8 23 98 1 R9 23 24 0.935 C4 24 98 28.4E-9 G2 98 23 20 33 1 * * ZERO - POLE AT 6.8MHZ / 40MHZ * R10 25 26 1 R11 26 98 4.88 L1 26 98 19.4E-9 G3 98 25 23 33 1 * * POLE AT 60 MHZ * R12 27 98 1 C5 27 98 2.65E-9 G4 98 27 25 33 1 * * ZERO AT 28 MHZ * R13 28 29 1 C6 28 29 -5.68E-9 R14 29 98 1E-6 E1 28 98 27 33 1E6 * * COMMON-MODE GAIN NETWORK WITH ZERO AT 60 KHZ * R15 30 31 1 L2 31 98 2.66E-6 G5 98 30 POLY(2) 1 33 2 33 0 5.0E-6 5.0E-6 D7 30 97 DX D8 51 30 DX * * POLE AT 80 MHZ * R16 32 98 1 C7 32 98 1.99E-9 G6 98 32 29 33 1 * * OUTPUT STAGE * R17 33 97 1 R18 33 51 1 GSY 99 50 POLY(1) 99 50 4.47E-3 40E-6 F1 34 0 V3 1 F2 0 34 V4 1 R19 34 99 180 R20 34 50 180 L3 34 39 1E-7 G7 37 50 32 34 5.56E-3 G8 38 50 34 32 5.56E-3 G9 34 99 99 32 5.56E-3 G10 50 34 32 50 5.56E-3 V3 35 34 2.5 V4 34 36 3.1 D9 32 35 DX D10 36 32 DX D11 99 37 DX D12 99 38 DX D13 50 37 DY D14 50 38 DY * * MODELS USED * .MODEL QX NPN(BF=6.25E6) .MODEL DX D(IS=1E-15) .MODEL DY D(IS=1E-15 BV=50) .MODEL DEN D(IS=1E-12, RS=2.45K, KF=7.93E-16, AF=1) .MODEL DIN D(IS=1E-12, RS=43.5E-6, KF=11.1E-15, AF=1) .ENDS * OP27 SPICE Macro-model 12/90, Rev. B * JCB / PMI * * Revision History: * REV. B * Re-ordered subcircuit call out nodes to put the * output node last. * Changed Ios from 7E-9 to 3.5E-9 * Added F1 and F2 to fix short circuit current limit. * * * Copyright 1990 by Analog Devices, Inc. * * Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance with the terms and provisions in the License Statement. * * Node assignments * non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * | | | | | .SUBCKT OP27 1 2 99 50 39 * * INPUT STAGE & POLE AT 80 MHZ * R3 5 97 0.0619 R4 6 97 0.0619 CIN 1 2 4E-12 C2 5 6 16.07E-9 I1 4 51 1 IOS 1 2 3.5E-9 EOS 9 10 POLY(1) 30 33 10E-6 1 Q1 5 2 7 QX Q2 6 9 8 QX R5 7 4 0.0107 R6 8 4 0.0107 D1 2 1 DX D2 1 2 DX EN 10 1 12 0 1 GN1 0 2 15 0 1 GN2 0 1 18 0 1 * EREF 98 0 33 0 1 EPLUS 97 0 99 0 1 ENEG 51 0 50 0 1 * * VOLTAGE NOISE SOURCE WITH FLICKER NOISE * DN1 11 12 DEN DN2 12 13 DEN VN1 11 0 DC 2 VN2 0 13 DC 2 * * CURRENT NOISE SOURCE WITH FLICKER NOISE * DN3 14 15 DIN DN4 15 16 DIN VN3 14 0 DC 2 VN4 0 16 DC 2 * * SECOND CURRENT NOISE SOURCE * DN5 17 18 DIN DN6 18 19 DIN VN5 17 0 DC 2 VN6 0 19 DC 2 * * GAIN STAGE & DOMINANT POLE AT 4.0 HZ * R7 20 98 111.5E3 C3 20 98 357E-9 G1 98 20 5 6 16.15 V1 97 21 1.2 V2 22 51 1.2 D5 20 21 DX D6 22 20 DX * * POLE - ZERO AT 2.9MHZ / 6MHZ * R8 23 98 1 R9 23 24 0.935 C4 24 98 28.4E-9 G2 98 23 20 33 1 * * ZERO - POLE AT 6.8MHZ / 40MHZ * R10 25 26 1 R11 26 98 4.88 L1 26 98 19.4E-9 G3 98 25 23 33 1 * * POLE AT 60 MHZ * R12 27 98 1 C5 27 98 2.65E-9 G4 98 27 25 33 1 * * ZERO AT 28 MHZ * R13 28 29 1 C6 28 29 -5.68E-9 R14 29 98 1E-6 E1 28 98 27 33 1E6 * * COMMON-MODE GAIN NETWORK WITH ZERO AT 3 KHZ * R15 30 31 1 L2 31 98 53.1E-6 G5 98 30 POLY(2) 2 33 1 33 0 250.5E-9 250.5E-9 D7 30 97 DX D8 51 30 DX * * POLE AT 80 MHZ * R16 32 98 1 C7 32 98 1.99E-9 G6 98 32 29 33 1 * * OUTPUT STAGE * R17 33 97 1 R18 33 51 1 GSY 99 50 POLY(1) 99 50 1.8E-3 40E-6 F1 34 0 V3 1 F2 0 34 V4 1 R19 34 99 180 R20 34 50 180 L3 34 39 1E-7 G7 37 50 32 34 5.56E-3 G8 38 50 34 32 5.56E-3 G9 34 99 99 32 5.56E-3 G10 50 34 32 50 5.56E-3 V3 35 34 2.5 V4 34 36 3.1 D9 32 35 DX D10 36 32 DX D11 99 37 DX D12 99 38 DX D13 50 37 DY D14 50 38 DY * * MODELS USED * .MODEL QX NPN(BF=50E6) .MODEL DX D(IS=1E-15) .MODEL DY D(IS=1E-15 BV=50) .MODEL DEN D(IS=1E-12, RS=1.09K, KF=1.08E-16, AF=1) .MODEL DIN D(IS=1E-12, RS=19.3E-6, KF=4.28E-15, AF=1) .ENDS * OP27E SPICE Macro-model 12/90, Rev. B * JCB / PMI * * Revision History: * REV. B * Re-ordered subcircuit call out nodes to put the * output node last. * Changed Ios from 35E-9 to 17.5E-9 * Added F1 and F2 to fix short circuit current limit. * * * This version of the OP-27 model simulates the worst case * parameters of the 'E' grade. The worst case parameters * used correspond to those in the data book. * * * Copyright 1990 by Analog Devices, Inc. * * Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance with the terms and provisions in the License Statement. * * Node assignments * non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * | | | | | .SUBCKT OP27E 1 2 99 50 39 * * INPUT STAGE & POLE AT 80 MHZ * R3 5 97 0.0619 R4 6 97 0.0619 CIN 1 2 4E-12 C2 5 6 16.07E-9 I1 4 51 1 IOS 1 2 17.5E-9 EOS 9 10 POLY(1) 30 33 25E-6 1 Q1 5 2 7 QX Q2 6 9 8 QX R5 7 4 0.0107 R6 8 4 0.0107 D1 2 1 DX D2 1 2 DX EN 10 1 12 0 1 GN1 0 2 15 0 1 GN2 0 1 18 0 1 * EREF 98 0 33 0 1 EPLUS 97 0 99 0 1 ENEG 51 0 50 0 1 * * VOLTAGE NOISE SOURCE WITH FLICKER NOISE * DN1 11 12 DEN DN2 12 13 DEN VN1 11 0 DC 2 VN2 0 13 DC 2 * * CURRENT NOISE SOURCE WITH FLICKER NOISE * DN3 14 15 DIN DN4 15 16 DIN VN3 14 0 DC 2 VN4 0 16 DC 2 * * SECOND CURRENT NOISE SOURCE * DN5 17 18 DIN DN6 18 19 DIN VN5 17 0 DC 2 VN6 0 19 DC 2 * * FIRST GAIN STAGE * RG1 40 98 1 GG1 98 40 5 6 79.86 DG3 40 41 DX DG4 42 40 DX EG1 97 41 POLY(1) 97 33 -2.1 1 EG2 42 51 POLY(1) 97 33 -2.1 1 * * GAIN STAGE & DOMINANT POLE AT 7.2 HZ * R7 20 98 37.58E3 C3 20 98 588E-9 G1 98 20 40 33 0.333 V1 97 21 1.9 V2 22 51 1.9 D5 20 21 DX D6 22 20 DX * * POLE - ZERO AT 2.9MHZ / 6MHZ * R8 23 98 1 R9 23 24 0.935 C4 24 98 28.4E-9 G2 98 23 20 33 1 * * ZERO - POLE AT 6.8MHZ / 40MHZ * R10 25 26 1 R11 26 98 4.88 L1 26 98 19.4E-9 G3 98 25 23 33 1 * * POLE AT 60 MHZ * R12 27 98 1 C5 27 98 2.65E-9 G4 98 27 25 33 1 * * ZERO AT 28 MHZ * R13 28 29 1 C6 28 29 -5.68E-9 R14 29 98 1E-6 E1 28 98 27 33 1E6 * * COMMON-MODE GAIN NETWORK WITH ZERO AT 11.9 KHZ * R15 30 31 1 L2 31 98 13.3E-6 G5 98 30 POLY(2) 1 33 2 33 0 997.6E-9 997.6E-9 D7 30 97 DX D8 51 30 DX * * POLE AT 80 MHZ * R16 32 98 1 C7 32 98 1.99E-9 G6 98 32 29 33 1 * * OUTPUT STAGE * R17 33 97 1 R18 33 51 1 GSY 99 50 POLY(1) 99 50 3.47E-3 40E-6 F1 34 0 V3 1 F2 0 34 V4 1 R19 34 99 180 R20 34 50 180 L3 34 39 1E-7 G7 37 50 32 34 5.56E-3 G8 38 50 34 32 5.56E-3 G9 34 99 99 32 5.56E-3 G10 50 34 32 50 5.56E-3 V3 35 34 2.5 V4 34 36 3.1 D9 32 35 DX D10 36 32 DX D11 99 37 DX D12 99 38 DX D13 50 37 DY D14 50 38 DY * * MODELS USED * .MODEL QX NPN(BF=12.5E6) .MODEL DX D(IS=1E-15) .MODEL DY D(IS=1E-15 BV=50) .MODEL DEN D(IS=1E-12, RS=1.74K, KF=4.01E-16, AF=1) .MODEL DIN D(IS=1E-12, RS=43.5E-6, KF=11.1E-15, AF=1) .ENDS * OP27F SPICE Macro-model 12/90, Rev. B * JCB / PMI * * Revision History: * REV. B * Re-ordered subcircuit call out nodes to put the * output node last. * Changed Ios from 50E-9 to 25E-9 * Added F1 and F2 to fix short circuit current limit. * * * This version of the OP-27 model simulates the worst case * parameters of the 'F' grade. The worst case parameters * used correspond to those in the data book. * * Copyright 1990 by Analog Devices, Inc. * * Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance with the terms and provisions in the License Statement. * * Node assignments * non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * | | | | | .SUBCKT OP27F 1 2 99 50 39 * * INPUT STAGE & POLE AT 80 MHZ * R3 5 97 0.0619 R4 6 97 0.0619 CIN 1 2 4E-12 C2 5 6 16.07E-9 I1 4 51 1 IOS 1 2 25E-9 EOS 9 10 POLY(1) 30 33 60E-6 1 Q1 5 2 7 QX Q2 6 9 8 QX R5 7 4 0.0107 R6 8 4 0.0107 D1 2 1 DX D2 1 2 DX EN 10 1 12 0 1 GN1 0 2 15 0 1 GN2 0 1 18 0 1 * EREF 98 0 33 0 1 EPLUS 97 0 99 0 1 ENEG 51 0 50 0 1 * * VOLTAGE NOISE SOURCE WITH FLICKER NOISE * DN1 11 12 DEN DN2 12 13 DEN VN1 11 0 DC 2 VN2 0 13 DC 2 * * CURRENT NOISE SOURCE WITH FLICKER NOISE * DN3 14 15 DIN DN4 15 16 DIN VN3 14 0 DC 2 VN4 0 16 DC 2 * * SECOND CURRENT NOISE SOURCE * DN5 17 18 DIN DN6 18 19 DIN VN5 17 0 DC 2 VN6 0 19 DC 2 * * FIRST GAIN STAGE * RG1 40 98 1 GG1 98 40 5 6 79.86 DG3 40 41 DX DG4 42 40 DX EG1 97 41 POLY(1) 97 33 -2.1 1 EG2 42 51 POLY(1) 97 33 -2.1 1 * * GAIN STAGE & DOMINANT POLE AT 7.2 HZ * R7 20 98 37.58E3 C3 20 98 588E-9 G1 98 20 40 33 0.333 V1 97 21 1.9 V2 22 51 1.9 D5 20 21 DX D6 22 20 DX * * POLE - ZERO AT 2.9MHZ / 6MHZ * R8 23 98 1 R9 23 24 0.935 C4 24 98 28.4E-9 G2 98 23 20 33 1 * * ZERO - POLE AT 6.8MHZ / 40MHZ * R10 25 26 1 R11 26 98 4.88 L1 26 98 19.4E-9 G3 98 25 23 33 1 * * POLE AT 60 MHZ * R12 27 98 1 C5 27 98 2.65E-9 G4 98 27 25 33 1 * * ZERO AT 28 MHZ * R13 28 29 1 C6 28 29 -5.68E-9 R14 29 98 1E-6 E1 28 98 27 33 1E6 * * COMMON-MODE GAIN NETWORK WITH ZERO AT 30 KHZ * R15 30 31 1 L2 31 98 5.3E-6 G5 98 30 POLY(2) 1 33 2 33 0 2.51E-6 2.51E-6 D7 30 97 DX D8 51 30 DX * * POLE AT 80 MHZ * R16 32 98 1 C7 32 98 1.99E-9 G6 98 32 29 33 1 * * OUTPUT STAGE * R17 33 97 1 R18 33 51 1 GSY 99 50 POLY(1) 99 50 3.47E-3 40E-6 F1 34 0 V3 1 F2 0 34 V4 1 R19 34 99 180 R20 34 50 180 L3 34 39 1E-7 G7 37 50 32 34 5.56E-3 G8 38 50 34 32 5.56E-3 G9 34 99 99 32 5.56E-3 G10 50 34 32 50 5.56E-3 V3 35 34 2.5 V4 34 36 3.1 D9 32 35 DX D10 36 32 DX D11 99 37 DX D12 99 38 DX D13 50 37 DY D14 50 38 DY * * MODELS USED * .MODEL QX NPN(BF=9.09E6) .MODEL DX D(IS=1E-15) .MODEL DY D(IS=1E-15 BV=50) .MODEL DEN D(IS=1E-12, RS=1.74K, KF=4.01E-16, AF=1) .MODEL DIN D(IS=1E-12, RS=43.5E-6, KF=11.1E-15, AF=1) .ENDS * OP27G SPICE Macro-model 12/90, Rev. B * JCB / PMI * * Revision History: * REV. B * Re-ordered subcircuit call out nodes to put the * output node last. * Changed Ios from 75E-9 to 37.5E-9 * Added F1 and F2 to fix short circuit current limit. * * * This version of the OP-27 model simulates the worst case * parameters of the 'G' grade. The worst case parameters * used correspond to those in the data book. * * * Copyright 1990 by Analog Devices, Inc. * * Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance with the terms and provisions in the License Statement. * * Node assignments * non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * | | | | | .SUBCKT OP27G 1 2 99 50 39 * * INPUT STAGE & POLE AT 80 MHZ * R3 5 97 0.0619 R4 6 97 0.0619 CIN 1 2 4E-12 C2 5 6 16.07E-9 I1 4 51 1 IOS 1 2 37.5E-9 EOS 9 10 POLY(1) 30 33 100E-6 1 Q1 5 2 7 QX Q2 6 9 8 QX R5 7 4 0.0107 R6 8 4 0.0107 D1 2 1 DX D2 1 2 DX EN 10 1 12 0 1 GN1 0 2 15 0 1 GN2 0 1 18 0 1 * EREF 98 0 33 0 1 EPLUS 97 0 99 0 1 ENEG 51 0 50 0 1 * * VOLTAGE NOISE SOURCE WITH FLICKER NOISE * DN1 11 12 DEN DN2 12 13 DEN VN1 11 0 DC 2 VN2 0 13 DC 2 * * CURRENT NOISE SOURCE WITH FLICKER NOISE * DN3 14 15 DIN DN4 15 16 DIN VN3 14 0 DC 2 VN4 0 16 DC 2 * * SECOND CURRENT NOISE SOURCE * DN5 17 18 DIN DN6 18 19 DIN VN5 17 0 DC 2 VN6 0 19 DC 2 * * FIRST GAIN STAGE * RG1 40 98 1 GG1 98 40 5 6 79.88 DG3 40 41 DX DG4 42 40 DX EG1 97 41 POLY(1) 97 33 -2.1 1 EG2 42 51 POLY(1) 97 33 -2.1 1 * * GAIN STAGE & DOMINANT POLE AT 10.3 HZ * R7 20 98 26.32E3 C3 20 98 588E-9 G1 98 20 40 33 0.333 V1 97 21 2.4 V2 22 51 2.4 D5 20 21 DX D6 22 20 DX * * POLE - ZERO AT 2.9MHZ / 6MHZ * R8 23 98 1 R9 23 24 0.935 C4 24 98 28.4E-9 G2 98 23 20 33 1 * * ZERO - POLE AT 6.8MHZ / 40MHZ * R10 25 26 1 R11 26 98 4.88 L1 26 98 19.4E-9 G3 98 25 23 33 1 * * POLE AT 60 MHZ * R12 27 98 1 C5 27 98 2.65E-9 G4 98 27 25 33 1 * * ZERO AT 28 MHZ * R13 28 29 1 C6 28 29 -5.68E-9 R14 29 98 1E-6 E1 28 98 27 33 1E6 * * COMMON-MODE GAIN NETWORK WITH ZERO AT 60 KHZ * R15 30 31 1 L2 31 98 2.66E-6 G5 98 30 POLY(2) 1 33 2 33 0 5.0E-6 5.0E-6 D7 30 97 DX D8 51 30 DX * * POLE AT 80 MHZ * R16 32 98 1 C7 32 98 1.99E-9 G6 98 32 29 33 1 * * OUTPUT STAGE * R17 33 97 1 R18 33 51 1 GSY 99 50 POLY(1) 99 50 4.47E-3 40E-6 F1 34 0 V3 1 F2 0 34 V4 1 R19 34 99 180 R20 34 50 180 L3 34 39 1E-7 G7 37 50 32 34 5.56E-3 G8 38 50 34 32 5.56E-3 G9 34 99 99 32 5.56E-3 G10 50 34 32 50 5.56E-3 V3 35 34 2.5 V4 34 36 3.1 D9 32 35 DX D10 36 32 DX D11 99 37 DX D12 99 38 DX D13 50 37 DY D14 50 38 DY * * MODELS USED * .MODEL QX NPN(BF=6.25E6) .MODEL DX D(IS=1E-15) .MODEL DY D(IS=1E-15 BV=50) .MODEL DEN D(IS=1E-12, RS=2.45K, KF=7.93E-16, AF=1) .MODEL DIN D(IS=1E-12, RS=43.5E-6, KF=11.1E-15, AF=1) .ENDS *////////////////////////////////////////////////////////////////////// * (C) National Semiconductor, Inc. * Models developed and under copyright by: * National Semiconductor, Inc. *///////////////////////////////////////////////////////////////////// * Legal Notice: This material is intended for free software support. * The file may be copied, and distributed; however, reselling the * material is illegal *//////////////////////////////////////////////////////////////////// * For ordering or technical information on these models, contact: * National Semiconductor's Customer Response Center * 7:00 A.M.--7:00 P.M. U.S. Central Time * (800) 272-9959 * For Applications support, contact the Internet address: * amps-apps@galaxy.nsc.com *////////////////////////////////////////////////////////// *LM741 OPERATIONAL AMPLIFIER MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LM741/NS 1 2 99 50 28 * *Features: *Improved performance over industry standards *Plug-in replacement for LM709,LM201,MC1439,748 *Input and output overload protection * ****************INPUT STAGE************** * IOS 2 1 20N *^Input offset current R1 1 3 250K R2 3 2 250K I1 4 50 100U R3 5 99 517 R4 6 99 517 Q1 5 2 4 QX Q2 6 7 4 QX *Fp2=2.55 MHz C4 5 6 60.3614P * ***********COMMON MODE EFFECT*********** * I2 99 50 1.6MA *^Quiescent supply current EOS 7 1 POLY(1) 16 49 1E-3 1 *Input offset voltage.^ R8 99 49 40K R9 49 50 40K * *********OUTPUT VOLTAGE LIMITING******** V2 99 8 1.63 D1 9 8 DX D2 10 9 DX V3 10 50 1.63 * **************SECOND STAGE************** * EH 99 98 99 49 1 G1 98 9 5 6 2.1E-3 *Fp1=5 Hz R5 98 9 95.493MEG C3 98 9 333.33P * ***************POLE STAGE*************** * *Fp=30 MHz G3 98 15 9 49 1E-6 R12 98 15 1MEG C5 98 15 5.3052E-15 * *********COMMON-MODE ZERO STAGE********* * *Fpcm=300 Hz G4 98 16 3 49 3.1623E-8 L2 98 17 530.5M R13 17 16 1K * **************OUTPUT STAGE************** * F6 50 99 POLY(1) V6 450U 1 E1 99 23 99 15 1 R16 24 23 25 D5 26 24 DX V6 26 22 0.65V R17 23 25 25 D6 25 27 DX V7 22 27 0.65V V5 22 21 0.18V D4 21 15 DX V4 20 22 0.18V D3 15 20 DX L3 22 28 100P RL3 22 28 100K * ***************MODELS USED************** * .MODEL DX D(IS=1E-15) .MODEL QX NPN(BF=625) * .ENDS *$